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68000 68030 CPLD FPGA ARM
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The 68000 CPU-2.1 Board
Jumpers
 
Default settings: place Jumpers as shown in RED below
 
J1 NMI - Non Maskable Interrupt
 
This Jumper enables/disables NMI interrupts from the on board pushbutton S2 and CN3 the external NMI pushbutton connector.
 
J1 open - disabled
J1 short - enabled
 
J2 DTACK
 
This Jumper allows DTACK to be grounded for test purposes.
 
J2 pins 1-2 short - DTACK grounded
J2 pins 2-3 short - normal operation
 
J3 BERR
 
This Jumper enables/disables the Bus Error feature.
 
J3 open - disabled
J3 short - enabled
 
J4 Data Bus Bias
 
This Jumper controls the bias applied to the 68000 data bus.
 
J4 pins 1-2 short - 68000 data bus biased low
J4 pins 2-3 short - 68000 data bus biased high
 
CN2 RESET
 
This Connector serves two purposes:
 
1. Connector for normally open pushbutton switch (External RESET).
2. Allows RESET & HALT to be grounded for test purposes (use shorting Jumper).
 
CN2 short - RESET & HALT grounded
CN2 open - normal operation
 
When RESET & HALT are grounded the 68000 address and data lines are disconnected i.e. they are in a high impedance state allowing external manipulation of the address and data lines.
 
CN3 NMI
 
Connector for normally open pushbutton switch (External NMI).
 
 
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All hardware designs, software, and information shared on this website is provided "as is"
without warranty of any kind and strictly for personal non-commercial use only.
 
 
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12 Edgefield Close
Redditch B98 7WB
ENGLAND
 
+44 (0)7973 265572
info@mega-micros.co.uk